NXP and MicroEJ Collaborate to Use Software Containers to Accelerate Embedded Platform Development

NXP Platform

The new NXP Platform Accelerator, co-developed with MicroEJ, leverages software containers with standard APIs to bring smartphone-like software design flexibility to the industrial and IoT edge, enabling a significant reduction in customer development costs and improving time to market.

NXP Semiconductors has announced the NXP Platform Accelerator, developed in collaboration with MicroEJ. The NXP Platform Accelerator leverages MICROEJ VEE software containers with standard APIs to bring a smartphone-like software design process experience to the industrial and IoT edge. The use of MICROEJ VEE enables software portability across NXP’s broad portfolio of RTOS-based MCUs and Linux-based Applications Processors, enabling manufacturers to significantly accelerate new product development and reduce costs. Furthermore, the NXP Platform Accelerator provides dedicated APIs to create easy access to advanced functionalities integrated in NXP’s processor portfolio, such as power management and 3D/2D graphics.

Smart devices across industrial and IoT markets are challenging to develop and deploy. Many are designed for a single purpose, with fixed functionality and limited computing capability that may be insufficient to support the evolving needs of an increasingly automated environment. Scaling product capability requires redeveloping and integrating low-level software, RTOS or higher-level OS, and middleware, which can create major development challenges and significantly slow product development.

The NXP Platform Accelerator solves this challenge by utilizing software containerization that enables binary software portability across the breadth of NXP’s processors portfolio, from MCUs to applications processors. Reusability at the binary level enables customers to prototype new products as quickly as possible and create a broad portfolio of complex smart devices that evolve with market needs and trends. Furthermore, the NXP Platform Accelerator enables sandboxed application deployment at the edge, bringing smartphone-like capability to the edge, such as partial or complete over-the-air updates, downloadable apps, and microservices.

“Just like what happened in the smartphone industry, containerization can be a tremendous tool to drive the rapid development of new smart device platforms,” said Charles Dachs, Senior Vice President and General Manager, Industrial and IoT Edge, NXP. “By integrating MicroEJ’s software container with NXP’s broad portfolio of edge processing solutions, we equip engineers to bring more products to market faster, with reduced costs, and to support the continuous evolution of their smart devices across industrial and IoT markets.” 

“Software portability and BoM optimization are often mutually exclusive,” said Fred Rivard, CEO of MicroEJ. “The NXP Platform Accelerator combines these two objectives, thanks to tiny software containers. This small-footprint innovation allows developers to benefit from both an optimized bill of materials and a modern software design process. This enables engineers to create new products and platforms more quickly, design products that are lower power and lower cost, while still allowing for feature-rich differentiation and innovation by device manufacturers.”

The NXP Platform Accelerator integrates advanced development tools, including simulation, virtual device management and a multi-language framework for combination of C, Java, and JavaScript languages, as well as agile collaboration processes and support for Android Studio, IntelliJ and Eclipse IDEs. In addition, the NXP Platform Accelerator integrates dedicated APIs for power management and graphic functions, making it extremely easy for customers to utilize the complex and powerful hardware IP brought by NXP. For example, a simple call to “low power profile” from the customer application layer will trigger performance optimization for a given power profile. In addition, NXP-tailored containers support broad scalability and integrate NXP-specific optimizations and libraries that leverage processor hardware innovations.

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